Cleaning up: garbage-free reversible circuits by design languages
Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review
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Cleaning up : garbage-free reversible circuits by design languages. / Thomsen, Michael Kirkedal; Axelsen, Holger Bock; Glück, Robert.
2012 International Symposium on Electronic System Design (ISED). IEEE, 2013. p. 6-10.Research output: Chapter in Book/Report/Conference proceeding › Article in proceedings › Research › peer-review
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TY - GEN
T1 - Cleaning up
AU - Thomsen, Michael Kirkedal
AU - Axelsen, Holger Bock
AU - Glück, Robert
N1 - Position paper.
PY - 2013
Y1 - 2013
N2 - Reversible logic is a computational model that ensure that no values are discarded or duplicated. This gives the connection to Landauer’s principle if and only if the underlying circuits are garbage-free.This paper shows how to describe and implement garbage-free reversible logic circuits in an easy and concise way. We use two domain-specific languages that are designed to describe reversible logic at different levels and garbage-free methods to translate between these. This approach relies heavily on programming language technology that is known and used for conventional functional languages. Though the languages ensure reversibility of the logic descriptions, they are not guaranteed to be garbage- free. It is still an important task for the designer to find the correct embeddings.
AB - Reversible logic is a computational model that ensure that no values are discarded or duplicated. This gives the connection to Landauer’s principle if and only if the underlying circuits are garbage-free.This paper shows how to describe and implement garbage-free reversible logic circuits in an easy and concise way. We use two domain-specific languages that are designed to describe reversible logic at different levels and garbage-free methods to translate between these. This approach relies heavily on programming language technology that is known and used for conventional functional languages. Though the languages ensure reversibility of the logic descriptions, they are not guaranteed to be garbage- free. It is still an important task for the designer to find the correct embeddings.
U2 - 10.1109/ISED.2012.20
DO - 10.1109/ISED.2012.20
M3 - Article in proceedings
SN - 978-1-4673-4704-4
SP - 6
EP - 10
BT - 2012 International Symposium on Electronic System Design (ISED)
PB - IEEE
Y2 - 19 December 2012 through 22 December 2012
ER -
ID: 41842238